Digital Design Engineer
職位編號 J025203
行業
類型 數字IC設計
所在地 杭州市 
職位描述:
Job Description: Successful candidate will be responsible for digital design and verification of mixed-signal ASSPs for power IC products. This will include hardware IP integration, custom logic design, and embedded firmware development. The candidate will also work with the design team to develop digital specifications and production test plans.
職位要求:
Digital Design Engineer 地點: 杭州 Job Description: Successful candidate will be responsible for digital design and verification of mixed-signal ASSPs for power IC products. This will include hardware IP integration, custom logic design, and embedded firmware development. The candidate will also work with the design team to develop digital specifications and production test plans. Primary Job Responsibilities: Work with analog and digital design engineers to define digital logic block operation. Perform RTL design in Verilog and/or System Verilog. Design ICs containing embedded processor IP. Perform synthesis, timing analysis, and scan/ATPG as needed. Work effectively with Place & Route engineer to define ports and close timing. Perform digital and mixed-signal design verification including:Verification using RTL, gates, and regression testing;Advanced verification techniques such as coverage driven testing, assertions, and formal verification;Work with analog design engineers to support co-simulation and real-number-modelling simulation flows;Analog block modelling in System Verilog using Real Number Modelling; Secondary Job Responsibilities: Write and verify embedded firmware (assembly, C languages). Analog block modelling in System Verilog using Real Number Modelling. Verification experience using UVM is preferred but no required. Additional Job Requirements: MSEE with Minimum 2+ years of industry experience preferred. Understanding of embedded processors and firmware (assembly, C languages). Solid understanding of verification best practices. Strong inter-personal, teamwork and communication skills including English fluency. Successfully communicate with designers of multiple product types to deliver first-pass success silicon. Must be a self-starter, should be able to work on assignments with minimal direction. Ability to work in a lab environment performing emulation and debug with combined FPGA and analog ICs.
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